product: I2S Verification IP by ANKASYS
I wrote and tested a VIP for I2S communication protocol
Using
UVM methodology
(UVM uses SystemVerilog language)
Siemens Mentor for EDA simulation software
Now this is a huge ANKASYS project that will make my website boring if I try to explain everything
So here is the test environment and some cute info.
A communications protocol is a set of formal rules describing
how to transmit or exchange data.
I2S (Inter-IC Sound) is a serial, synchronous communication protocol that is
usually used for transmitting audio data between two digital audio devices.
This Verification IP (VIP) is a module intended to be used within a defined verification methodology; UVM.
UVM stands for Universal Verification Methodology.
It is a standardized methodology for verifying digital designs
in the semiconductor industry.
UVM is built on top of the SystemVerilog language.
SystemVerilog is both a hardware description language and a hardware verification language.
It is used to model, design, simulate, verify, test, and implement algorithms.
DUT = DEVICE UNDER TEST